魏建军 王振愿 陈付龙 刘乃安 李晓辉

摘   要：功耗问题是制约集成电路设计的一个重要因素.分析了CMOS集成电路中功耗的来源，集成电路设计中功耗设计的目的，估算方法和功耗模型.研究模拟集成电路的特点和相应的功耗估计方法.针对采用环形振荡器的电荷泵锁相环，研究电荷泵锁相环的组成，各模块的工作原理及对功耗的贡献，提出了电荷泵锁相环系统级功耗估计模型.与实际测量结果相比，相对误差小于22%.该模型易于植入集成电路设计工具，可以对锁相环系统级设计提供功耗方面的参考，提高集成电路的设计质量.

关键词：功耗估计;功耗模型;能量转移;电荷泵锁相环

中图分类号：TM935                                 文献标志码：A

Power Estimation of Charge Pump PLL at System Level

WEI Jianjun1，WANG Zhenyuan1，CHEN Fulong2，LIU Naian1，LI Xiaohui1

（1. School of Telecommunications Engineering，Xidian University，Xi'an 710071，China;

2. School of Mathematics and Computer Science，Anhui Normal University，Wuhu 241003，China）

Abstract： Power is an important factor that restricts the design of Integrated Circuit （IC）. The power origin in CMOS IC，the aim of power estimation in IC design，the estimation method，and the power model were analyzed. The characteristic of analog integrated circuit and the corresponding way for power estimation were studied. In order to distribute the power at system level， the construction of charge pump PLL，the principle of every module and the contribution to power were also studied. The power estimation model of charge pump PLL with ring oscillator was proposed at system level. The relative error is less than 22% when compared with the actual measurement. This model is easy to be integrated into design tools and can give guidance on power consumption for PLL at system level to improve the quality of Integrated Circuit design.

Key words： power estimation;power model;energy transfer;charge pump PLL

集成電路集成度和时钟频率的大幅度提高，导致功耗问题日益突出，功耗已成为许多ASIC设计中的关键因素之一.但是，由于满足功耗设计需要的EDA软件发展缓慢，设计者不得不在设计后期反复验证以满足功耗特性，延长了产品设计周期，推迟了上市时间.为使功耗设计能溶入集成电路设计方法学，使得设计者在考虑延迟、噪声和芯片面积等因素的同时，也能对功耗进行分析权衡，高层次的功耗估计越来越迫切.电荷泵型锁相环频率综合器是一数模混合系统，大量使用在芯片中，提供精确的时钟或载波信号，虽然占用的面积不大，但功耗却很显著，在芯片系统设计阶段对其进行功耗估计，便于芯片的功耗分配.目前数字集……