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4K视频流HEVC编解码传输的异构多核方法研究

2019-04-04李毅航张宽尹雅君唐俊龙唐立军

现代电子技术 2019年6期

李毅航 张宽 尹雅君 唐俊龙 唐立军

关键词: 超高清视频; 4K视频流; HEVC编解码传输; 异构多核; 视频分辨率; 编码速率

中图分类号: TN919.3?34; TP302.1             文献标识码: A                    文章编号: 1004?373X(2019)06?0121?05

Abstract: The HEVC video codec standard is commonly used to compress and decompress high?definition video data, but for the ultra?high definition video data of 4K and above, the traditional video stream codec transmission method is difficult to achieve high?efficient video compression ratio and compression speed. Therefore, a heterogeneous multi?core video stream transmission method based on ARM+FPGA is proposed in this paper for the HEVC codec of ultra?high definition video stream. The Linux system is built by using the ARM, so as to realize multi?tasking processing and real?time monitoring. The FPGA is used to realize hardware acceleration, so as to receive, convert, process, encode, decode, output and display video streams. The HEVC codec transmission test was conducted on the Zynq UltraScale+MPSOC all programmable platform for the 4K video with a resolution of 3 840×2 160, frame rate of 30 f/s, pixel format of YUV420, color depth of 8 bits, and time duration of 120 s. The test results show that the time duration of the encoding is only 71s, and the compression rate of video data is as high as 6.19%, which can satisfy the codec transmission requirement of the 4K video.

Keywords: ultra?high definition video; 4K video stream; HEVC codec transmission; heterogeneous multi?core; video resolution; encoding rate

0  引  言

随着4K超高清视频(分辨率3 840×2 160)不断的推广和应用,由于图像清晰度的大幅提高,导致视频流数据量的剧增,因此,迫切需要使用HEVC/H.265高效的视频编解码标准,以解决海量的视频图像传输以及储存的问题[1]。而HEVC的编码复杂度高,传统的嵌入式方案很难满足4K视频流稳定快速的传输,保障HEVC编解码高效压缩以及提高编解码速率[2]。

本文采用Zynq UltraScale+MPSOC全可编程平台,利用软硬件协同的机制,构建异构多核的软硬件系统构架,探索一种高效的视频流编解码传输方法。针对4K视频流庞大的数据量传输问题,对视频直接内存存取进行研究,以减少数据搬运过程中资源的占用;对视频流数据类型分析,对不同的视频数据进行转换处理研究,来适配编解码器需求的格式。根据编解码器对数据的吞吐量,研究视频流传输通路的带宽、时钟以及延迟等,来保证编解码高效运行[3]。

1  视频流编解码传输方案

通常采用PC机进行4K视频HEVC编解码,但由于自身体积较大,不便集成和小型化,而ARM往往受限于自身的性能不足,难以进行HEVC编解码运算,单纯的FPGA因为开发周期过长,且应用形式单一,不能快速适应视频分辨率改变和视频流格式变化。本文主要探讨异构多核的视频流传输方法,利用FPGA硬件加速的特性来设计视频流编解码传输通路,利用ARM多任务处理与实时监控的特点来改变传输通路性能参数,高效灵活的方式保证4K视频流从接收、转移、处理、编解码和输出过程中稳定传输。……

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