Gate-regulated transition temperatures for electron hopping behaviours in silicon junctionless nanowire transistors
2020-07-21XinyuWuWeihuaHanXiaosongZhaoYangyanGuoXiaodiZhangandFuhuaYang
Xinyu Wu , Weihua Han , , Xiaosong Zhao , Yangyan Guo , Xiaodi Zhang , and Fuhua Yang ,
1School of Microelectronics, University of Chinese Academy of Sciences, Beijing 100049, China
2Engineering Research Center for Semiconductor Integrated Technology, Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China
3State Key Laboratory for Superlattices and Microstructures, Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China
Abstract: We investigate gate-regulated transition temperatures for electron hopping behaviours through discrete ionized dopant atoms in silicon junctionless nanowire transistors. We demonstrate that the localization length of the wave function in the spatial distribution is able to be manipulated by the gate electric field. The transition temperatures regulated as the function of the localization length and the density of states near the Fermi energy level allow us to understand the electron hopping behaviours under the influence of thermal activation energy and Coulomb interaction energy. This is useful for future quantum information processing by single dopant atoms in silicon.
Keywords: silicon junctionless nanowire transistor; discrete dopant atoms; gate regulation; transition temperatures
1.Introduction
Dopant atoms may draw more attention when they are used as a functional unit of ultra-small electronic devices instead of just providing carriers[1−3]. For example, new applications that require the discreteness of dopants, such as dopant-based spin qubits in the area of quantum computation[4,5]or single atom transistors[6], focus more on the advances toward observing, precise positioning and manipulating dopant atoms[7−10]. Owing to the emergence of high-pure semiconductor materials and the extreme downscaling of devices, discrete dopants have started to play an important role in most device transport properties[11,12]. In the last few years, the junctionless nanowire transistor (JNT) with uniform doping is considered to be a promising candidate to investigate quantum transport through dopant atoms due to its unique bulk conduction regulated by gate electric field[13−15].
Electron transport in the discrete dopant atomic system may be dominated by thermally assisted hopping between the dopants rather than by resonant tunnelling between source and drain. At higher temperatures, electrons can hop between the neighbouring dopants when they receive enough energy from a phonon, following the nearest-neighbour hopping (NNH) mechanism. The conductance in this case is given by), where A is constant, kBis the Boltzmann constant, and Eais the activation energy. At lower temperatures, the conductance is weakly temperatured ependent because variable range hopping (VRH) with lower activation energy is dominated. In a regime of VRH, the general form of temperature-dependent conductance is given by

The conductive channel in silicon junctionless nanowire transistor expands from the middle of the nanowire to the surrounding by adjusting the gate voltage. Once the junctionless nanowire transistor is turned on, the channel of electron transport can be seen as a quasi three-dimensional (3D) system. In the 3D case, the conductance follows the Mott law(M-VRH)[16]with



Fig. 1. (Color online) (a) Schematic structure of the silicon JNT. (b) Topview SEM images of the silicon JNT after gate formation.
2.Device fabrication and characterization
Fig. 1(a) shows a schematic of the devices fabricated on a(100)-oriented silicon-on-insulator (SOI) wafer with top silicon thickness of 55 nm and buried oxide layer of 145 nm. The SOI wafer with a 17-nm thermal oxidation layer was uniformly implanted by 33 keV phosphorus ions at a dose of 2 ×1012cm–2, followed by rapid annealing to activate dopant atoms. The silicon nanowire was defined by electron beam lithography (EBL) and reactive ion etching (RIE), followed by thermal oxidation at 900 °C to form a sacrificial oxidation layer. Next, this sacrificial oxidation layer was removed by buffered oxide etcher (BOE) to smooth the surface and further reduce the dimension of silicon nanowire. After formation of 22-nm-thick gate oxidation layer around the nanowire at 900 °C in dry oxygen, 200-nm-thick boron-doped polycrystalline silicon was deposited on the devices by low-pressure chemical vapor deposition (LPCVD). Subsequently, the polycrystalline silicon gate of 280 nm was patterned by electron beam lithography and dry etching, followed by deposition of 200 nm SiO2for passivation and fabrication of the source,drain and gate electrodes. The width of 60 nm for Si/SiO2core-shell nanowire measured by scanning electron microscope (SEM) is shown in Fig. 1(b). According to the consumption of top silicon layer by thermal oxidation in all directions,the cross-section of the silicon core is estimated to be 16 ×28 nm2. The electrical characteristics were measured by Agilent B1500 semiconductor parameter analyzer, and the devices were placed in a vacuum chamber which can be cooled down to 6 K with the help of a Lakershore-340 temperature controller.
3.Results and discussion
Fig. 2 shows drain current–gate voltage (Ids–Vg) characteristics (upper part) and corresponding transconductancegm–Vgcharacteristics (lower part) of JNT at the drain–source biasVds= 10 mV by varying temperature. Clearly, a series of drain-current oscillatory peaks and steps are observed below the temperature of 75 K, and these current features gradually disappear with increasing temperature due to thermal energy broadening around Fermi level. The drain current at low temperature, which evolves from oscillatory peaks to current steps with the gate voltage, reflects that electron transport in dopant-levels gradually transfers into one-dimensional transport in conduction sub-bands. Similar features have also been observed in other devices that have been fabricated in the same way. According to the corresponding curves of the transconductancegmas a function of gate voltageVg(i.e.,) in the lower part, we can identify three groups of peaks which locate at the gate voltage of about 2.12, 2.41, and 2.86 V, respectively. The positions of peaks at different temperatures in each group are slightly different, possibly due to the interface defects at the Si/SiO2interface and the electron density from the ionized dopants[21]. These transconductance peaks may originate from dopant-induced quantum dots and discrete sub-bands in the conduction band.

Fig. 2. (Color online) Drain current Ids versus gate voltage Vg with Vds =10 mV at different temperatures (upper part) and corresponding transconductance gm–Vg curves (lower part).
To distinguish the three groups of transconductance peaks precisely, we measured the energy barrier between source and drain extracted from the thermally activated current at temperatures above 150 K. As shown in Fig. 3(a), the barrier height gradually decreases with gate voltage, which is associated with lower activation energy at larger electrical field. The gate voltage at 2.40 V can be determined by linear extrapolation of the curve to zero barrier height, showing that the conduction band edgeEcreaches the Fermi levelEFof the source. It can be also observed that the position of gate voltage 2.40 V corresponds to a demarcation line between the first group of transconductance peaks and the other two groups in the inset of Fig. 3(a). As a result, the first group of transconductance peaks in Fig. 2 comes from discrete dopant-levels below the conduction edge. Then, one-dimensional transport of electrons occurs in the conduction sub-bands with the increase of gate voltage, resulting in the second and third groups of transconductance peaks.

Fig. 3. (Color online) (a) Barrier height of the device channel is extracted by fitting the thermally activated current. The conduction band edge EC reaches the Fermi level EF at 2.40 V. Inset: transconductance gm–Vg curves at low temperature. (b) Locally amplified transconductance gm–Vg curves before gate voltage 2.40 V, which are successively shifted for clarify.

Fig. 4. (Color online) Arrhenius plots of the conductance G1, G2, G3,and G4 for each group. The inset: close-up of the curves around 75 K.
We can identify new four groups of peaks marked by cross in Fig. 3(b) through locally amplifying the transconductancegm–Vgcurves before 2.40 V. Since the gate-voltage spacing of those peaks is small and the positions of them are basically the same at different temperatures, those transconductance peaks can not originate from the surface roughness of the silicon nanowire. It is reported that dopants in the conductive channel have an effect on electron transport when the JNT is just turned on[22−24]. The ionized dopant atoms in local nano-space can work as quantum dots, containing one-electron neutral D0state and two-electrons charged D–state. The average gate voltage spacingbetween peaks 1 and 3 (peaks 2 and 4) in Fig. 3(b) is estimated to be 0.18 V (0.21 V), and the deduced dopant/gate capacitanceaF (0.76 aF) corresponds to a dopant with 2.09 nm (1.78 nm) radius. This radius agrees well with the Bohr radius of a donor in silicon nanowire. Therefore, the four groups of peaks can be considered as an indication of electron transport through the D0and D–states of the donors. At high doping concentration, a lower Hubbard band and an upper Hubbard band are formed respectively under the coupling of one-electron neutral state (D0) and two-electron charged state (D–). In this case, electron transport is due to the Hubbard band which is different from the mechanism that we discussed in this study. According to the implantation dose, the doping concentrationNDis calculated to be 1 × 1017cm–3. Then, the mean distance between the dopant atoms is estimated to be , which is more than twice the Bohr radius of phosphorus atoms in silicon. It can be concluded that those dopant atoms are in a discrete state[25]. In this case, electron transport is dominated by thermally activated hopping.
To obtain a better insight into the electron hopping mechanism, we experimentally extracted the conductance values at the position of transconductance peaks in each group,and those unrecognizable peaks at high temperatures are determined by the method of energy level alignment. Fig. 4 shows the Arrhenius plots (Gversus 1/T) of temperature-dependent conductanceG1,G2,G3, andG4, respectively at the transconductance peaks of different gate voltages under the biasVds= 10 mV. Three regions (i.e., A, B, and C) in the Arrhenius plots of conductance correspond to NNH, M-VRH and ESVRH. The transition temperatureTAfrom NNH to M-VRH is a critical point at which the hopping distance in M-VRH is supposed to be equivalent to the mean distance between neighbouring dopant atoms. The expression ofTAis given by,being the localization length in a regime of M-VRH,the constant density of states at the Fermi level andthe mean distance between the dopant atoms.The transition temperatureTCfrom M-VRH to ES-VRH is another critical point at which the activation energyis as large as the Coulomb interaction energyΔ, i.e.,. The expression ofTCis given by, whereis the localization length in a regime of ES-VRH,is the electron charge andis the relative permittivity. The detailed calculation methods of transition temperatures have been reported in our previous work[20]. Through conductance linear fitting in different temperature region, we obtain the transition temperatureTAof 78, 80, 79, and 81 K respectively for theG1,G2,G3, andG4curves in Fig. 4, which is consistent with the experimental value 75 K. Using the constant density of statesg0in M-VRH regime and the relative permittivityεrfor silicon material, we get the transition temperatureTCof 18, 27, 38, and 46 K, which is also consistent with the experimental phenomenon in Fig. 4. According to the conductance values at the corresponding positions of transconductance valleys in Fig. 3(b), we further calculated the transition temperaturesTAto be 79, 76, 76, and 78 K andTCto be 22,30, 41, and 53 K.

Fig. 5. (Color online) (a) The gate-voltage regulated transition temperature TA and TC. (b) The gate-voltage dependence of the density of state and the localization length.

Fig. 6. (Color online) The behaviour of electron hopping (a) from MVRH to NNH in and (b) from ES-VRH to M-VRH in.
The gate-voltage dependence of the transition temperatures is provided in the Fig. 5(a). It can be found thatTAis relatively stable for the transconductance peak and valley positions, whileTCincreases with the increase of gate voltage.The difference betweenTAandTCis associated with the density of stateg0and the localization length, as shown in Fig. 5(b). According to the Eqs. (2) and (3), the characteristic temperaturesTMandTEScan be derived from the slopes of the and plots, respectively. Then the localization lengthand, which correspond to M-VRH and ES-VRH respectively, are extracted fromTMandTES.Fig. 5(b) indicates that both the density of stateg0and the localization lengthandincrease with the increasing gate voltages, which allow more dopant atoms to work as quantum dots with lower barriers in a wider channel. The spatial extent of electron wave function from those dopant sites is also enhanced by the enhanced gate electric field.
To understand the stable transition temperatureTAat which electron hopping behaviours from M-VRH to NNH occurs, in Fig. 6(a) we describe the transition of hopping behaviours. Mott’s model has pointed out that electrons localized close to the Fermi level could hop from one localized site to another with the lowest activation energyby variable ranges. However, the activation energyat higher temperatures is large enough for electron hopping between any nearest neighbouring sites, and the increasing gate voltage only contributes to the number of electrons capable of hopping in those sites. We also notice in Fig. 5(b) that the localization lengthin M-VRH is much less than the mean distancedbetween the dopant atoms, i.e.. In this case, the coupling of electron wave function between nearest neighbour dopant atoms is very weak although the localization lengthincreases with the increasing gate voltages in Fig. 5(b). Therefore, the stable transition temperatureTAshould attribute to large activation energy and small localization length in the regime of M-VRH.
The gate-dependent transition temperatureTCis regulated by the density of states and the localization lengthin ES-VRH. At lower temperatures, electrons would choose further localized states to hop due to the low activation energyEES, which is not enough to overcome the Coulomb interaction energy. With the increase of gate voltage, the number of states for electron hopping increases, resulting in the decrease of the average hopping distanceof electrons, and the Coulomb interaction energy,
4.Conclusion
In conclusion, we investigate gate-regulated transition temperatures of electron hopping behaviours in silicon junctionless nanowire transistor. The experimental data of temperature-dependent conductance illustrated by the Arrhenius plots is consistent with the theoretical model, showing that the electron hopping is ES-VRH, M-VRH and NNH with the increase of temperature. The transition temperatureTAis relatively stable and mainly depends on the mean distance between the dopant atoms. In contrast, the transition temperatureTCcan be regulated by gate electrical field due to the longer localization length in the case of ES-VRH. The role of dopant atoms used as functional units becomes more and more important in ultra-small devices and the study on elec-tron hopping by dopant atoms is of great significance to the development of those atomic-scale silicon transistors.
Acknowledgements
The authors acknowledge Dr. Hao Wang, Dr. Liuhong Ma and Mr. Xiaoming Li for their helps in device fabrication. This work was supported by the National Key R&D Program of China (Grant No.2016YFA0200503).
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