一种高PSR CMOS带隙基准电路设计
2014-07-09贺志伟姜岩峰
贺志伟+姜岩峰
摘 要: 为了降低芯片电路功耗,电源电压需要不断的减小,这将导致电源噪声对基准电压产生严重影响。为此针对这一问题进行相关研究,采用SMIC 0.18 μm工艺,设计出一种低功耗、低温度系数的高PSR带隙基准电压源。仿真结果表明,该设计带隙基准源的PSR在50 kHz与100 kHz分别为-65.13 dB和-53.85 dB;在2~6 V电源电压下,工作电流为30 μA,温度系数为30.38 ppm/℃,电压调整率为71.47 μV/V。该带隙基准适用于在低功耗高PSR性能需求的LDOs电路中应用。
关键词: 带隙基准电压; 低功耗; 电源抑制; 电路设计
中图分类号: TN402?34 文献标识码: A 文章编号: 1004?373X(2014)13?0153?03
Design of CMOS bandgap voltage reference circuit with high PSR
HE Zhi?wei, JIANG Yan?feng
(Microelectronic Research Center, North China University of Technology, Beijing 100144, China)
Abstract: The power supply voltage needs to be constantly decreased to meet the requirement of reducing the low?power consumption of IC, but it may lead to the negative impact of power supply noise on the reference voltage. A low?power consumption bandgap voltage reference with high PSR (power supply rejection) and low?temperature coefficent was design based on in SMIC0.18μm process. The simulation results show that the PSR of the bandgap reference source is -65.13 dB at 50 kHz and -53.85 dB at 100 kHz respectively; at 2~6 V supply voltage, the supply current is 30 μA, the temperature coefficient is 30.38 ppm/℃, and the voltage regulation rate is 71.47 μV/V. The bandgap voltage reference is suitable for LDOs circuit which has the requirements of low?power consumption and high PSR.
Keywords: bandgap reference voltage; low?power consumption; power supply rejection; circuit design
0 引 言
在高科技快速发展的今天,人们的生活已经离不开电子产品,为了能满足人们对产品性能的需求,现在的IC行业面对着巨大的挑战。当今高性能模拟、数模混合、数字和电源管理系统都需要非常稳定的基准电压源[1]。例如广泛应用于电源管理芯片、A/D和D/A转换器芯片、数据采集芯片等中的带隙基准,其性能好坏直接影响整个系统的精度及稳定性[2]。
现在的电子产品中,几乎都反映出一个共同的缺点,电池电量不够大,而现代的电池容量大小在短时间内不会得到较大的改善,因此,人们就想法如何降低电子产品功耗。降低功耗必然需要降低器件工作电压。带隙基准是任何模拟集成电路的一个重要单元,工作电压的降低,信号噪声对带隙基准的精度将显得越发突出,因此,在越来越低的电源电压下,低功耗、低温度系数、高PSR的带隙基准变得越来越重要[3],如何改善带隙基准的信号噪声成为了一个热门研究的话题。……
